Siemens and Samsung expand foundry design collaboration

Key Takeaways

• Siemens and Samsung Foundry collaborate to support semiconductor design and manufacturing workflows
• The collaboration focuses on photonic integrated circuit verification, physical verification, and layout optimization
• Siemens' Calibre software is qualified for Samsung Foundry processes, including 2 nm nodes
• The partnership aims to improve design quality, shorten development cycles, and enhance first-pass silicon results

Introduction to Semiconductor Design Collaboration

Siemens and Samsung Foundry have announced an expanded collaboration to support fabless chip developers in semiconductor design and manufacturing workflows. This ongoing partnership aims to improve design quality, shorten development cycles, and enhance first-pass silicon results at Samsung's advanced nodes, including 2 nm processes.

Photonic Integrated Circuit Verification

The collaboration includes expanding work in photonic integrated circuit verification to address the increasing complexity of photonic designs. Using Siemens' Calibre software, the joint solution supports equation-based design rule checking, curvilinear layout-versus-schematic verification, and pattern matching. These capabilities verify complex curvilinear geometries and manufacturable PIC designs within Samsung Foundry process flows.

Physical Verification and Layout Optimization

For physical verification and layout optimization, Siemens' Calibre nmPlatform software is qualified for Samsung Foundry processes. The software includes tools such as nmDRC, nmLVS, PERC, xACT, and Calibre DesignEnhancer. To address power integrity issues, Samsung Foundry is working with Siemens on automated methods to improve power-grid robustness. The following comparison table highlights the key features of Calibre nmPlatform software:

Design-for-Test and Yield Analysis

Siemens' Tessent design-for-test portfolio supports scalable DFT methodologies for advanced-node yield analysis. The joint work focuses on defect-oriented test strategies and physical failure analysis to help reduce defective parts per million. The partnership has established a high-resolution chain diagnosis reference flow at Samsung Foundry using Tessent HiRes Chain Diagnosis.

Advanced Packaging and 3D IC Integration

In advanced packaging, Samsung Foundry has adopted Siemens tools to support its 2.3D Cube-E advanced package platform. Innovator3D IC Integrator supports early-stage full-project floorplanning and design updates, while Innovator3D IC Layout automates daisy-chain netlist generation for designs with more than two million pins.

Bottom Line

The collaboration between Siemens and Samsung Foundry aims to improve semiconductor design and manufacturing workflows, enabling fabless chip developers to create high-quality, reliable, and efficient chips. With a focus on photonic integrated circuit verification, physical verification, and layout optimization, this partnership is expected to drive innovation and advancement in the semiconductor industry, particularly at advanced nodes such as 2 nm and 3 nm processes.