NVIDIA and Cisco plan 400 Gb/s-per-lane USFP module

Key Takeaways

• NVIDIA & Cisco are co‑developing an Ultra‑Dense Small Form‑Factor Pluggable (USFP) module that delivers 400 Gb/s per lane.
• The first‑generation USFP will house 16 full‑duplex lanes in an OSFP‑sized chassis, giving a 12.8 Tb/s aggregate bandwidth.
• Compared with 200 Gb/s‑per‑lane pluggables, USFP offers 4× front‑panel density, ≈1.3× better power efficiency, and supports up to 100 W dissipation without dedicated cooling.
• The design is future‑proof for 32‑lane (or more) configurations, enabling AI factories to scale without adding extra switch tiers.

Why AI Factories Need a New Optical Standard

AI training and inference workloads are exploding in size, pushing data‑center networks to their limits. Operators must balance three competing pressures:

A 400 Gb/s‑per‑lane solution directly tackles these pain points by doubling the data moved on each lane while halving the number of lanes needed for a given throughput.

USFP Architecture Overview

• Form factor: OSFP‑compatible (≈ 2 × 1.5 in²), enabling drop‑in replacement of existing pluggable transceivers.
• Lane count: 16 full‑duplex lanes in the initial release; the connector’s 2‑D array is engineered for 32 + lanes in later revisions.
• Signal integrity: A two‑step insertion mechanism engages high‑speed contacts after the module is seated, reducing wear and ensuring consistent insertion force.
• Power handling: Up to 100 W can be dissipated without an embedded cooler, simplifying switch board design.

By packing more lanes into the same footprint, a single USFP can connect 1.6 Tb/s endpoints (16 × 100 Gb/s) while delivering 12.8 Tb/s of total capacity—enough to feed next‑generation AI accelerators without additional network tiers.

Performance vs. 200 Gb/s‑per‑lane Modules

The table illustrates that USFP not only doubles per‑lane speed but also quadruples overall throughput while delivering a measurable power‑efficiency gain.

Integrating USFP into Switches and SuperNICs

USFP’s electrical interface is tuned for 400 Gb/s operation, yet it remains backward compatible with 200 Gb/s traffic, allowing gradual migration. The two‑dimensional connector reduces mechanical stress, which is critical for high‑density rack deployments where hot‑swap reliability is a must.

Because the module can run at 100 W without an internal fan, switch designers can omit bulky heat‑sink structures, freeing board real‑estate for additional ports or higher‑density ASICs.

Roadmap and Availability

• Q4 2024: Silicon validation and early‑stage prototype testing with NVIDIA DGX and Cisco Nexus platforms.
• H1 2025: Pilot deployments in select hyperscale AI clusters.
• Late 2025: Commercial launch of the 16‑lane USFP, with firmware support for both 200 Gb/s and 400 Gb/s modes.

Future revisions targeting 32‑lane configurations are slated for 2026, aligning with the anticipated 800 Gb/s Ethernet standard.

Bottom Line

NVIDIA and Cisco’s USFP module is a decisive step toward eliminating the “network bottleneck” in AI factories. By delivering 400 Gb/s per lane, 12.8 Tb/s aggregate bandwidth, and enhanced power efficiency within an OSFP‑compatible chassis, USFP lets data‑center operators double throughput without expanding their physical footprint or power budget. For organizations scaling AI workloads, the USFP promises a smoother, more cost‑effective path to next‑generation compute density.