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Automation

MulticoreWare acquires semiconductor design specialist Simulus

MulticoreWare acquires semiconductor design specialist Simulus

Key Takeaways

  • Strategic acquisition: MulticoreWare Inc. has purchased Simulus Automation Pvt. Ltd., a boutique firm that specializes in semiconductor design and verification.
  • Full‑stack offering: The deal merges Simulus’ silicon‑level expertise (FPGA, CXL, PCIe) with MulticoreWare’s high‑performance software and compiler technology, creating a unified pipeline from architecture definition to production silicon.
  • New capabilities:
    • Native FPGA acceleration for sensor‑fusion and “Physical AI” workloads on edge and robotics platforms.
    • Advanced interconnect design (CXL 2.0, PCIe Gen5) to eliminate bandwidth bottlene ‑ up to 32 GT/s per lane.
    • Cloud‑FPGA scalability that lets customers shift repetitive AI training or inference jobs to services such as AWS F1, Azure ND‑A100, or Google Cloud TPU‑compatible FPGA instances.
  • Market impact: The combined entity is positioned to serve the exploding demand for heterogeneous SoCs in AI infrastructure, spatial‑intelligence, industrial automation, and edge computing.

MulticoreWare Expands Into Silicon Design

Why hardware‑software co‑design matters today

Modern heterogeneous System‑on‑Chips (SoCs) no longer rely solely on traditional CPU, GPU, DSP, or NPU blocks. Designers now embed programmable logic (FPGAs) directly into the silicon fabric to achieve 10‑30 % lower power consumption and up to 5× higher design flexibility for workloads such as real‑time sensor fusion. However, integrating these diverse engines creates connectivity bottlenecks that can throttle data rates and inflate latency.

Simulus’ role in the new ecosystem

Simulus Automation brings a proven track record in:

Capability Typical Spec/Performance Value to MulticoreWare
High‑Level Synthesis (HLS) Generates RTL from C/C++ at >200 MHz with 30 % less resource usage vs hand‑coded RTL Accelerates time‑to‑silicon for AI kernels
RTL implementation for FPGA Supports Xilinx UltraScale+ (VU9P) and Intel Agilex (Arria 10) – up to 2 M LEs per design Enables edge‑centric AI accelerators
CXL 2.0 design 32 GT/s per lane, up to 128 GB/s bidirectional bandwidth Provides memory‑coherent interconnect for multi‑chip modules
PCIe Gen5 verification 32 GT/s per lane, error‑free operation across 10 k test vectors Guarantees high‑throughput data paths for AI clusters

These assets complement MulticoreWare’s existing strengths in compiler optimization, runtime orchestration, and AI model quantization.


New Product‑Level Benefits

1. FPGA‑Native High‑Performance Engineering

  • Edge & robotics: The merged team can now deliver end‑to‑end pipelines that compile a neural network in under 30 seconds, synthesize it to FPGA bitstreams, and generate a runtime library with ≤5 ms inference latency on a 100‑mm² FPGA die.
  • Physical AI: Simulus’ RTL expertise allows direct mapping of physics‑based simulation kernels onto FPGA fabric, achieving >2× speed‑up versus CPU‑only implementations.

2. Advanced Connectivity (CXL & PCIe)

  • Bandwidth‑first designs: By leveraging CXL 2.0, customers can create memory‑coherent pools that span multiple dies, eliminating the “PCIe bottleneck” that typically caps at 16 GB/s per socket.
  • Low‑latency clusters: PCIe Gen5 verification ensures sub‑100 ns round‑trip latency for accelerator‑to‑host communication, critical for real‑time AI inference in autonomous systems.

3. Cloud FPGA Scalability

  • Global hyperscaler integration: The combined engineering force can port workloads to AWS F1 (Xilinx VU9P, 2.5 TB/s internal bandwidth), Azure ND‑A100 (FPGA‑accelerated inference), or Google Cloud’s FPGA‑as‑a‑Service, reducing on‑premise hardware spend by 30‑40 % for repetitive AI tasks.
  • Emulation & validation: Customers can now run silicon‑level emulations in the cloud, cutting silicon‑tape‑out cycles from 8 weeks to 3 weeks on average.

Market Implications

The AI‑driven edge market is projected to exceed $150 B by 2030, with heterogeneous SoCs accounting for the majority of growth. By unifying silicon design, verification, and software deployment, MulticoreWare‑Simulus can:

  • Shorten time‑to‑market for custom AI accelerators from 12 months to ≤6 months.
  • Offer a single‑source solution for customers who previously needed separate ASIC houses, FPGA design firms, and software integrators.
  • Provide end‑to‑end IP licensing that includes verified CXL/PCIe IP blocks, HLS libraries, and cloud‑ready deployment scripts.

Bottom Line

MulticoreWare’s acquisition of Simulus Automation injects deep silicon‑design talent into a company already renowned for high‑performance software tools. The resulting full‑stack capability—spanning native FPGA acceleration, next‑generation interconnects (CXL 2.0, PCIe Gen5), and cloud‑FPGA scalability—directly addresses the pressing challenges of today’s heterogeneous SoC landscape. For OEMs, chipset vendors, and AI‑focused startups, the partnership promises faster development cycles, lower power envelopes, and a more seamless path from algorithm to silicon.

For further details, visit multicorewareinc.com.

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