Key Takeaways
- Microchip’s PolarFire FPGA/SoC family now ships with built‑in EtherCAT and Time‑Sensitive Networking (TSN) IP.
- EtherCAT runs at 10/100/1000 Mbps with sub‑microsecond cycle times; TSN delivers deterministic 1 Gbps Ethernet per IEEE 802.1 standards.
- The solution targets AI‑enabled automation, robotics, and edge‑compute nodes that demand low power (< 2 W), instant‑on security (secure‑boot, anti‑tamper) and minimal board‑level complexity.
- Beckhoff’s EtherCAT IP and Microchip’s TSN IP are fully compatible with both PolarFire FPGA and PolarFire SoC devices, enabling a single‑chip platform for mixed‑protocol industrial networks.
Introduction: Real‑Time Networking for the Modern Edge
Industrial automation is moving beyond simple PLC loops toward AI‑driven robotics, predictive maintenance, and edge analytics. Those workloads require deterministic, high‑speed Ethernet while keeping power budgets tight and protecting against cyber‑threats. Microchip Technology answered that call by extending its Industrial Edge Networking Solution Stack with native EtherCAT and TSN support on the PolarFire family of FPGAs and System‑on‑Chips.
What the New IP Brings
EtherCAT on PolarFire
- Speed options: 10 Mbps, 100 Mbps, and 1 Gbps (full‑duplex).
- Typical cycle time: ≤ 0.8 µs per 1 kB frame, enabling sub‑millisecond control loops.
- Latency jitter: < 100 ns across a 10‑node ring.
- Compatibility: Beckhoff Automation’s EtherCAT IP (ET1820/ET1821/ET1822) is pre‑qualified for both PolarFire FPGA and PolarFire SoC devices.
TSN on PolarFire
- Standard compliance: IEEE 802.1AS (time sync), 802.1Qbv (time‑aware shaping), 802.1Qcc (stream reservation).
- Throughput: Deterministic 1 Gbps Ethernet with guaranteed bandwidth per stream.
- Deterministic latency: 1 µs – 10 µs depending on traffic class and queue depth.
- Supported on: PolarFire FPGA SoCs only (leveraging embedded ARM Cortex‑A5 cores for protocol stack off‑load).
PolarFire Devices: Power‑Efficient, Secure, and Flexible
| Parameter | PolarFire FPGA | PolarFire SoC |
|---|---|---|
| Logic elements (LEs) | Up to 300 k | Up to 250 k |
| DSP blocks | 1 024 | 768 |
| Embedded memory | 3 Mb SRAM | 2 Mb SRAM + 1 Gb DDR3/LPDDR4 |
| Max I/O speed | 1 Gbps transceivers | 1 Gbps transceivers |
| Power consumption (typical) | 0.8 W – 2 W (core) | 1 W – 2.5 W (core + ARM) |
| Security features | Secure boot, anti‑tamper, encrypted configuration | Same + hardware root of trust |
| Instant‑on | Yes (non‑volatile configuration) | Yes |
- Instant‑on operation: The non‑volatile configuration memory allows the device to resume operation within 10 ms after power‑up, eliminating boot‑loader latency.
- Security: Integrated secure‑boot validates the bitstream signature; anti‑tamper sensors monitor voltage and temperature anomalies.
How EtherCAT and TSN Complement Each Other
| Aspect | EtherCAT | TSN |
|---|---|---|
| Primary use case | High‑speed, short‑cycle I/O (motion control, sensor aggregation) | Deterministic traffic shaping for mixed‑criticality streams (video, AI inference, control) |
| Maximum bandwidth | 1 Gbps (full‑duplex) | 1 Gbps (deterministic) |
| Cycle time | ≤ 0.8 µs (typical) | 1 µs – 10 µs (depends on class) |
| Network topology | Linear, ring, or tree (no switch needed) | Switched Ethernet (IEEE 802.1) |
| Latency jitter | < 100 ns | < 500 ns (with proper scheduling) |
| Compatibility | Beckhoff EtherCAT IP (ET182x series) | Microchip TSN IP (802.1AS/1Qbv) |
By integrating both stacks on a single PolarFire silicon, system designers can mix EtherCAT nodes for ultra‑fast I/O with TSN‑backed Ethernet for bandwidth‑hungry AI workloads, all while keeping the PCB footprint and BOM low.
Development Ecosystem
- Design tools: Microchip’s Libero SoC Design Suite (version 2024.1) now ships with pre‑validated EtherCAT and TSN IP cores, timing‑closure wizards, and automated reference‑design generation.
- Reference designs: Two starter kits are available – a PolarFire‑EtherCAT Evaluation Kit (supports up to 8 EtherCAT slaves) and a PolarFire‑TSN Edge Kit (includes a 1 Gbps Ethernet PHY and a TSN‑ready switch).
- Software stack: Open‑source EtherCAT master libraries and Microchip’s TSN Linux driver (kernel 5.15+) accelerate integration with ROS‑2, OPC UA, and IEC 62443‑compliant security layers.
Bottom Line
Microchip’s addition of EtherCAT and TSN IP to the PolarFire FPGA/SoC portfolio gives industrial developers a single, low‑power silicon platform that can handle both ultra‑fast deterministic I/O and bandwidth‑intensive, time‑sensitive Ethernet traffic. With secure, instant‑on operation and a mature development ecosystem, the new stack reduces system complexity, shortens time‑